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Location

This example can be found in the Artemis installation folder:

C:\OPAL-RT\ARTEMIS\[ARTEMIS version]\\common\Examples\SmartInverterLib_Protection

Description

The objective of the example model is to demonstrate the functionality of each of the PB according to the IEEE 1547-2018 and IEEE 1547-2020 standards [1] [2]. The demonstrations are performed in closed loop considering the interaction of all the control layers in the converter. The procedures, operating points, and some of the control parameters presented in this section are based on the IEEE 1547.1-2020 standard [2]. The example model was developed to show all the features of the PB library. Thus, the user can select the PB scenario only by changing a simple setting in the Reference Generator region.

Model

The figure below shows the schematic diagram of the example model. This model comprises a region for the circuit of the grid-following inverter with an inductive output filter (blue), a region for all the control and signal conditioning blocks (gray), a region to generate the reference signals for each test (purple), and a region for the protection blocks (green).

To demonstrate all the functionalities of the PB library, the voltage and frequency of the grid (symbolized by three AC sources at the right of the blue region) are varied according to the reference generator block. Also, the ROCOF and the connection breaker can be controlled by the reference generator block. The reference signals vary depending on the selected scenario. By default, the quick example scenario is selected. However, the user can select other scenarios to assess a particular PB functionality.

Throughout the tests, the model is run at a sampling period of 50e-6 s. The simulation parameters and control variables, which are loaded from the ‘SmartInverterLib_Protection_init’ file, are described as below:

Fnom=60;                                                   System frequency (Hz):

Ts=50e-6;                                                   Simscape Power Systems sample time (s)

Srated = 5e3;                                              Inverter nominal 3-phase power (VA)

Pnom = 5e3;                                               Inverter nominal 3-phase active power (W)

Vnom = 208;                                               Nominal inverter output line-to-line voltage(Vrms)

Vdcnom = 400;                                           Nominal DC link voltage (V)

Ilim = Srated/(Vnom/sqrt(3))*sqrt(2);          Inverter output current limit

L1 = 5e-3;                                                   L filter inductor (H)

R1= 0.1;                                                      L filter resistor (ohm)

kpp = 2;                                                      Active power controller proportional gain

kip = 60;                                                   Active power controller integral gain

kpq = 2;                                                      Reactive power controller proportional gain

kiq = 100;                                                   Reactive power controller proportional gain

 kpI = 2;                                                      Current controller proportional gain

kiI = 400;                                                   Current controller integral gain

Simulation and Results

The protection blocks are validated in simulation using MATLAB/Simulink r2016b. In addition to the quick example (EXAMPLE) and the nominal scenario (NOMINAL), a total of six scenarios with their variations are included in the example model as follows:

  • Frequency Protection
    • Instantaneous value (FREQUENCY)
    • ROCOF (ROCOF)
  • Voltage Protection (VOLTAGE)
  • Bridge Protection
    • AC side (BRIDGE AC)
    • DC side (BRIDGE DC)
  • Islanding Detection (ISLANDING)
    • GE Frequency Method
    • GE Voltage Method
    • GE Voltage+Frequency Method

For each validation scenario, the Time-to-Trip time (TtT) is shown. For all scenarios, the primary control block is programmed in closed-loop control for both active and reactive power. To select each scenario, the scenario in the "Test Generator" must be modified.

 Scenario 0 - Quick Example

The quick example scenario is configured to show three of the most important features of the PB library: frequency protection, voltage protection, and islanding detection. For this test, the frequency limit was defined as Fo = 61.2 Hz with a TtT of 3 s, the voltage limit was defined as Vu = 0.5 p.u. with a TtT of 2 s, and the islanding detection method was set to GE Voltage+Frequency scheme. 

Step id

Test Description

Testing Time

Cummulated Time

Signals of interest

0.1

Adjust the power output to 1 p.u.

3

0

P, Freq, Vrms, Trip, VRTm, TtT

0.2

Ramp the grid frequency to the frequency point 0.99Fo

2

3

0.3

Ramp the grid frequency to the frequency point 1.01Fo1

1

5

0.4

Measure the clearing time (time-to-trip) from the moment that the frequency achieves Fo

4

6

0.5

Clear the fault and ramp the grid frequency to nominal values

2

10

0.6

Step down the voltage to 1.01Vu

1

12

0.7

Step down the voltage to 0.99Vu

2

13

0.8

Clear the fault and step up the voltage to nominal values

2

15

0.9

Adjust the power output to 0.6 p.u.

1

17

0.10

Open the connection breaker and watch the trip signal

2

18

The figure below shows the test results for the Quick Example. First, the frequency is increased above the limit, this starts the counting of the F_TtT signal. When the F_TtT signal reaches the TtT for frequency ( 3 s), the trip signal is activated. Then, the voltage is decreased below the limit. Notice that the VRTm signal is set to 2, which means that the power injection becomes zero and no trip signal is activated as part of the momentary cessation mode. Then, after 2 s, the trip signal is activated. Finally, the connection breaker is opened at t = 18 s. The islanding detection algorithm causes the voltage and frequency to move away from the nominal values and the trip signal is activated by the ROCOF protection.

Scenario 1 - Frequency Protection

Frequency protection is divided into instantaneous value and ROCOF. For the instantaneous value, the frequency of the grid is varied below the specified limits and then, outside of those limits, TtT is measured. For the ROCOF, the ROCOF of the grid is varied under the limit and then, varied again outside of the limit to count the TtT. Limits and times are defined as follows:

Over-Frequency Points:

Fo1 = 61.2;

Fo2 = 62;

Tof1 = 3;

Tof2 = 0.16;

Under-Frequency Points:

Fu1 = 58.5;

Fu2 = 56.5;

Tuf1 = 3;

Tuf2 = 0.16;

ROCOF:

ROCOF_threshold = 3;

ROCOF_average_time_window = 0.1;

Scenario 1.1 - Instantaneous Frequency Value

In this scenario, the instantaneous value of the frequency is moved around the limits to evaluate TtT. The scenario sequence is presented below:

Step id

Test Description

Testing Time

Signals of interest

1.1

Adjust the power output to Prated=5kW, set the rate limit to 1Hz/s on the grid frequency.

3

P, Freq, Trip, TtT

1.2

Ramp the grid frequency to the frequency point 0.99FoN

2

1.3

Ramp the grid frequency to the frequency point 1.01Fo1 for at least 1.5TofN

>1.5TofN

1.4

Measure the clearing time (time-to-trip) from the moment that the frequency achieves Fo1 and re initialize the inverter to nominal values

1

1.5

Clear the fault

2

1.6

Repeat steps 1.2 to 1.5 for N=2.


1.7

Repeat steps from 1.2 to 1.6 for under frequency (Fu,Tuf) limits.


Simulation results are presented below. It is seen that the converter trips when expected according to the frequency variations. The TtT measurements show an adequate result as configured for each frequency trip region.

Scenario 1.2 - ROCOF

In this scenario, the ROCOF of the grid is varied around the limit value and the TtT is evaluated. The scenario sequence for the ROCOF validation is presented below:

Step id

Test Description

Testing Time

Signals of interest

2.1

Adjust the power output to Prated=5kW. 
Set the grid voltage and frequency to nominal values

3

P, Freq, Trip

2.2

Set the rate limit of the frequency reference to 2.9Hz/s

0

2.3

Ramp the frequency to 61.1Hz. Verify the trip condition on the block

2

2.4

Set the rate limit of the frequency reference to 3.1 Hz/s. Ramp the frequency to 60Hz. Verify the trip condition on the block to be at least the size of the Average Time Window

3

Simulation results are presented below. It is noticed that, during the ramp-up, the trip signal is not activated. However, during the ramp-down, the protection is activated once the time window size of 0.1 s has passed.

Scenario 2 - Voltage Protection

For this scenario, the voltage amplitude of the grid is varied below the specified limits and then, outside of those limits, TtT is measured. Also, the voltage ride-through mode (VRT) output signal is recorded. Limits and times are defined as follows:

Over-Voltage Points:

Vo1=1.2;

Vo2=1.1;

Tov1=0.16;

Tov2=3;

Mode_OV1= Cease to Energize (3);

Mode_OV2= Momentary Cessation (2);


Under-Voltage Points:

Vu1=0.5;

Vu2=0.7;

Vu3=0.88;

Tuv1=1;

Tuv2=3;

Tuv3=5;

Mode_UV1=Momentary Cessation (2);

Mode_UV2=Mandatory Operation (1);

Mode_UV3=Mandatory Operation (1);

Step id

Test Description

Testing Time (s)

Signals of interest

3.1

Adjust the power output to Prated=5k.

3

P, Q, Vgrms, TtT

3.2

Step the grid voltage to the voltage point 0.99Vo2

1

3.3

Step the grid voltage to the voltage point 1.105Vo2

1

3.4

Measure the clearing time (time-to-trip) from the moment that the voltage achieves Vo1. Record the VRT mode

0

3.5

Clear the fault and re initialize the inverter at nominal values

2

3.6

Repeat steps 3.2 to 3.5 for N=2 for OV and N=2 and 3 for UV

-

3.7

Step grid voltage to 1.01Vo2 and watch for momentary cessation

2


3.8

Step grid voltage to 0.99 Vu1 and watch for momentary cessation

0.5


Simulation results are presented in below. The voltage protection block generates a trip signal whenever the time defined for each voltage region passes. However, the VRTm signal specifies the ride-through mode that the converter should assume during abnormal conditions. It can also be noticed that, when VRTm is equal to 2 (momentary cessation), power injection is zero, but the trip flag is not activated until the TtT has passed. As it is appreciated from the simulation results, the TtT for each voltage region shows adequate results and the trip signal and expected trip signal match with a slight difference caused by the RMS voltage estimation filter.

Scenario 3 - Bridge Protection

The bridge protection validation is divided into AC side and DC side. For both scenarios, the active power reference is increased at t = 2.5 s and the trip signal is activated when the instantaneous current crosses the defined threshold and the action time delay has passed. The TtT is measured for each test. However, for the sake of simplicity, the TtT was measured using ScopeView for both scenarios. The parameters for the tests are defined as follows:

AC Test:

iDCth_AC (kA)=0.05;        %DC threshold for AC test equivalent to 20kW

iACth_AC (kA)=0.0118;      %AC threshold for AC test equivalent to 3kW

DC Test:

iDCth_DC (kA)=0.005;       %DC threshold for DC test equivalent to 2kW

iACth_DC (kA)=0.0236;      %AC threshold for DC test equivalent to 6kW

Action Time Delay (s) = 0.1;

Nominal Test (use for all other tests):

iDCth_nom=0.05;               %DC threshold nominal
iACth_nom=0.0236*10;      %AC threshold nominal

Important note: Depending on the desired test scenario (AC test or DC test), the two threshold values must be manually replaced in the mask as follows:

The values with the "_nom" extension are used as regular threshold values that are used in all the scenarios presented in this helpfile. To run AC or DC bridge protection test scenario, just replace the "_nom" extension by "_AC" or "_DC" in both fields.

Scenario 3.1 - AC Bridge Protection

Simulation results are presented below. As shown in the measured current, the trip signal is activated 0.1 s after the current threshold of 11.8 A is crossed.

Scenario 3.2 - DC Bridge Protection

Simulation results are presented below. As shown in the measured current, the trip signal is activated 0.1 s after the current threshold of 5 A is crossed.

Scenario 4 - Islanding Detection

For this release of the Smart Inverter Library, the GE method for active islanding detection was implemented [3]. This method is suitable for three-phase power systems and has three different configurations: GE Frequency, GE Voltage, and GE Voltage+Frequency. All of them produce positive feedback in the voltage and/or frequency with the output current to generate abnormal conditions. These abnormal conditions (voltage and/or frequency) are detected by the voltage and/or frequency protection blocks of the library. The configuration of the Islanding Detection feature is implemented inside the Wave Reference block. Refer to its help file for more details.

For this scenario, the converter injects 0.6 p.u. of active power and, at t = 6 s, the grid-connection breaker is open to induce an unintentional islanding event. The figure below shows the simulation of an unintentional islanding event without using any islanding detection method. Although the RMS voltage is reduced, this deviation is not enough to trigger a trip signal from the voltage protection block. For cases like this, where the power sharing before islanding is similar to the local load demand after islanding,  active detection algorithms such as the GE scheme are required.

Scenario 4.1 - GE-Frequency Scheme for Islanding Detection

The figure below shows the results using the GE Frequency scheme. The trip signal is activated once the breaker is open. However, it is noticed that it is activated by the voltage protection instead of the frequency protection block. It is also noticed that the frequency is having an unstable oscillatory behavior between the breaker opening time and the trip signal acknowledgment.

Scenario 4.2 - GE-Voltage Scheme for Islanding Detection

The figure below shows the results using the GE Voltage scheme. The trip signal is activated once the breaker is open. It is also noticed that the voltage is having an unstable oscillatory behavior between the breaker opening time and the trip signal acknowledgment. The voltage protection detects the abnormal condition and sends the trip signal accordingly.

Scenario 4.3 - GE-Frequency+Voltage Scheme for Islanding Detection

The figure below shows the results using the GE Frequency+Voltage scheme. The trip signal is activated once the breaker is open. It is also noticed that the frequency and voltage are having an unstable oscillatory behavior between the breaker opening time and the trip signal acknowledgment. The voltage protection detects the abnormal condition and sends the trip signal accordingly.

References

[1]

IEEE, "IEEE Standard for Interconnection and Interoperability of Distributed Energy Resources with Associated Electric Power Systems Interfaces," IEEE Std 1547-2018 (Revision of IEEE Std 1547-2003), no. doi: 10.1109/IEEESTD.2018.8332112, pp. 1-138, 2018.

[2]

IEEE, "IEEE Standard Conformance Test Procedures for Equipment Interconnecting Distributed Energy Resources with Electric Power Systems and Associated Interfaces," IEEE Std 1547.1-2020, pp. 1-282, 2020.

[3]

U.S. National Renewable Energy Laboratory, "Study and Development of Anti-Islanding Control for Grid-Connected Inverters," Golden, CO, 2004.

Intellectual Property Disclaimer

Natural Resources Canada owns all intellectual property rights in the Smart Inverter Modelling Toolbox software and related products.

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