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MATLAB/Simulink flags (to be added in the MATLAB/Simulink model)

In some circumstances, users may want to try the following ARTEMiS flags:

FlagUsage & Notes
op_ssn_allow_simultaneous_iterations=1 (lower case)

The default iSWITCH iteration method was modified in ARTEMiS 7.0.6 to only allow 1 switch to change of conduction status during each iteration loop. This was found to be more robust than the previous method in which multiple switches could change of status during each iteration.

Setting op_ssn_allow_simultaneous_iterations=1 in the MATLAB workspace will force the SSN to use the previous iteration method. The previous iteration method may increase the simulation speed because less iteration loop is required to make all switches respect their working conditions; however, it may be less stable. For example, the 18-pulse diode rectifier demo named SSN_iSWITCH_18pulse_rectifier is stable only with the new iteration method.

USE_MFILE_SSN_SFUNCTION=1 (upper case)Adding this value at the MATLAB prompt will force SSN to use the internal m-coded S-function. This option will also highlight a balancing factor for the admittance matrix of the groups. Normally, this factor should be 0 but in numerically difficult cases, it may be greater than 0, indicating a problematic SSN grouping, V/I-type selection or limit parameters.

op_ssn_online_quad_precision_inversion=1

(lower case)

This flag makes ARTEMiS precalculation routine use quadruple precision floating-point arithmetic for all matrix inversions, on the target only. Windows and Microsoft Visual Studio don’t support quadruple precision, therefore the option will only have an effect during a real-time simulation on Linux targets.



Note: that the real enabling condition of flags is really that the variable exists in the workspace, not that it equals 1. To disable the flag, the variable must be deleted from the MATLAB workspace.


op_ssn_print_iteration_infoThis flag prints SSN iteration information if set.
ARTEMIS_USE_STATE_SPACE_SFUN=1Since ARTEMiS 7.3, all types of submodels, even the ones without NIB, use the SSN S-function. This is natural because simple state-space models can be viewed as a special case of SSN model with a unique group. This flag forces the use of the legacy ARTEMiS state-space S-function for parts of the SPS model not using SSN. The legacy ARTEMiS S-function is a little bit faster than the SSN one is very small models.
RT-LAB flags and optimizations to be added to the RT-LAB GUI interface
Manual core selection

Also, when performing real-time simulation of very large distribution systems, it may be required to manually select the cores on which the simulation is taking place. In general, simulation speed is higher when all SSN parallel cores are selected on the same processor (or socket). But if memory access goes out of the cache when doing so, the simulation may be faster if cores are selected on different processors (or socket). This is due to each processor typically having its own L3 cache.

To obtain the correspondence between the RT-LAB core number and the physical core, the following Linux command will link processor -> core and physical id -> CPU.

less /proc/cpuinfo

Let’s say that one has an RT-LAB system with 2 processors with 6 cores each. Normally, the RT-LAB numbering numerates all cores from the 1st processor (0,1,2,3,4,5) and then enumerates the cores of the 2nd processor (6,7,8,9,10,11)

Compilers on real-time targets

With very large models, users may want to try different compilers and compiler options.

RTLAB_INTEL_COMPILER flag

By default, this RT-LAB variable is set to one, forcing the use of the Intel compiler on RedHat targets. By setting this variable to 0, the GCC compiler is used instead. In very large models, it may happen that GCC produces faster code than the Intel compiler. This variable is accessible from the RT-LAB->Variables tab

INTEL compiler options: with very large models, the Intel compiler may produce the following warning message on the target:

An internal threshold was exceeded for routine resavpp_noged_duf4b__1_sm_big_grid_output and optimization level may be reduced. See http://software.intel.com/en-us/articles/internal-threshold-was-exceeded for more information and advice.

To override this warning message, the following flag

-override-limits

can be added in the <Development> tab of RT-LAB->target platform: RedHat (64bits)-> Compiler tab -> Compiler options. It sometimes improves real-time performance.



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