Specifications
IO Capabilities
This configuration requires the following FPGA boards. Please refer to the linked product page for additional information.
| Quantity | FPGA Board |
|---|---|
| 1 | PXIe-7868R |
The PXIe-7868R supports the following features:
IO Type | Details |
|---|---|
| Analog Input | 6 CH, 1MS\s, 16-bit, +/- 10V Input Signal Range, Differential Tunable Gain, Offset, and Min/Max Saturation |
| Analog Output | 18 CH, 1MS\s, 16-bit User-defined mapping to Analog Outputs available with tunable Gain, Offset, and Min/Max Saturation.
|
| Digital Input | 32 CH, 80MHz, 3.3V TTL (Connector 1) |
| Digital Output | 16, 10MHz, 3.3V TTL (Connector 0) User-defined mapping to Digital Outputs available with tunable Polarity.
|
Refer to 7868 IO Assignation [eHSx32_Dual_PMSM_SH_IO_7868R] to see the IO assignment.
Modeling Capabilities
This configuration includes a pre-compiled firmware/bitfile which contains the following features:
Features | Additional Information |
|---|---|
1x eHSx32 Solver | User-defined mapping to Circuit Sources available:
User-defined mapping to Circuit Switches available:
|
| 2x PMSM Spatial Harmonics Model | V1 implementation of the PMSM SH machine model. Refer to Permanent Magnet Synchronous Machine Models Comparison for more information. |
| 1x Resolver/motor | Excitation assignable to any analog input port |
| 1x Encoder/motor | Assignable to any DO port |
| 1x Hall Effect Sensor/motor | Assignable to any DO port |
| 32x Sinewave Generators | |
| 16x PWM Generators | |
| 12x Sinusoidal PWM Generators | |
| Analog Output Mapping and Rescaling | |
| Analog Input Rescaling | |
| 32x Waveform Acquisition Channels |