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The OP5600 is a complete simulation system. It contains a powerful target computer, a reconfigurable FPGA and signal conditioning for up to 256 I/Os.

It comes in two versions: the OP5640 includes a Xilinx Spartan3 FPGA and the OP5660 includes a Xilinx ML605 FPGA. The OP5640 is also available as an I/O expansion chassis only, not including the target computer.




Note: The OP5640 and OP5660 are being replaced by newer products. Consult your sales representative for equivalent products.



The design makes it easy to use with standard connectors (DB37, RJ45, and mini-BNC) without the need for input/output adaptors and allows quick connections for monitoring I/O signals. It is designed to be used either as a desktop, shelf top, or mounted in a standard 19’’ rack.

The front of the chassis provides access to the target computer’s standard connectors, and monitoring interfaces and connectors, while the back of the chassis provides access to the I/O connectors, power cable and main power switch.

Simulator Architecture

The main housing is divided into two sections, each with a specific purpose:

The lower section of the chassis contains a powerful target computer that can be added to a network of simulators or can act as a standalone. This target computer is used to run simulations built with OPAL-RT’s RT-LAB or HYPERSIM software and includes the following features:

  • ATX motherboard
  • Linux-based real-time operating system
  • Xeon E5 Intel CPU with 4, 8, 16 and 32 processor cores, CPU frequency between 2.3 and 3.2 GHz and 10MB Cache Memory per 4 cores (see Configuration Options below for details)
  • up to 32GB of DRAM
  • 512GB SSD disk
  • 6 PCIe slots, with the possibility to install riser boards for two additional PCIe or 4 PCI slots

The upper section contains the high-speed FPGA and the conditioning modules for up to 256 I/Os. It includes:

  • a Xilinx Spartan 3 or Virtex 6 FPGA, programmable from the target computer via PCIe. The FPGA is used to execute models designed with the OPAL-RT RT-XSG tool and manage the I/O lines. It exchanges data with the real-time simulations running on the target computer CPUs via PCIe
  • an 8-slot flat carrier board, capable of connecting any combination of up to 8 OP5300 mezzanine modules for the OP5640 configuration, and up to 6 mezzanine modules for the OP5660 configuration

The following image illustrates this architecture:


Note: The example shown is only to illustrate how the OP5600 is assembled. OPAL-RT strictly prohibits users from opening the OP5600. Opening the unit renders the warranty null and void.


Configuration Options

The OP5600 is available in a number of different configurations that make it easier to integrate into your environment:

Product

Configuration Description

Status

OP5640-I/O

OP5600 RCP/HIL Spartan3 FPGA Processor and I/O Expansion Unit (4U)

End-of-life


OP5640-4

OP5600 RCP/HIL Spartan3 FPGA-based Real-Time Simulator: 4 cores (4U, Xeon E5, 4 Cores, 3.0 GHz, 10M, 16GB, 512GB SSD)

End-of-life

OP5640-8

OP5600 RCP/HIL Spartan3 FPGA-based Real-Time Simulator: 8 cores (4U, Xeon E5, 8 Cores, 3.2 GHz, 20M, 16GB, 512GB SSD)

End-of-life

OP5640-16

OP5600 RCP/HIL Spartan3 FPGA-based Real-Time Simulator: 16 cores (4U, Xeon E5, 2x8 Cores, 3.2 GHz, 2x20M, 2x16GB, 512GB SSD)

End-of-life

OP5640-32

OP5600 RCP/HIL Spartan3 FPGA-based Real-Time Simulator: 32 cores (4U, Xeon E5, 2x16 Cores, 2.3 GHz, 2x40M, 2x16GB, 512GB SSD)

End-of-life


OP5660-4

OP5600 RCP/HIL Virtex6 FPGA-based Real-Time Simulator: 4 cores (4U, Xeon E5, 4 Cores, 3.0 GHz, 10M, 16GB, 512GB SSD)

Obsolete

OP5660-8

OP5600 RCP/HIL Virtex6 FPGA-based Real-Time Simulator: 8 cores (4U, Xeon E5, 8 Cores, 3.2 GHz, 20M, 16GB, 512GB SSD)

Obsolete

OP5660-16

OP5600 RCP/HIL Virtex6 FPGA-based Real-Time Simulator: 16 cores (4U, Xeon E5, 2x8 Cores, 3.2 GHz, 2x20M, 2x16GB, 512GB SSD)

Obsolete

OP5660-32

OP5600 RCP/HIL Virtex6 FPGA-based Real-Time Simulator: 32 cores (4U, Xeon E5, 2x16 Cores, 2.3 GHz, 2x40M, 2x16GB, 512GB SSD)

Obsolete



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