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Before designing cables, OPAL-RT recommends using these guidelines: Simulator EMC cable recommendations.

As explained in OP5707XG IO Configuration, the OP5300 mezzanine modules are grouped in 4 pairs, and the two mezzanines of each pair are labelled A and B.

The pinout of the two P1 and P2 connectors of each mezzanine is as follows: 

A or B sections
P1 ConnectorP2 Connector

DB37

Module pin assignment

RJ45

DB37

Module pin assignment

DB37

Module pin assignment

RJ45

DB37

Module pin assignment


1

+CH00

 

0-3

20

-CH00

1

+CH16

 

16-19

20

-CH16

Pin Assignment

2

+CH01

21

-CH01

2

+CH17

21

-CH17

3

+CH02

22

-CH02

3

+CH18

22

-CH18

4

+CH03

23

-CH03

4

+CH19

23

-CH19

5

+CH04

 

4-7

24

-CH04

5

+CH20

 

20-23

24

-CH20

6

+CH05

25

-CH05

6

+CH21

25

-CH21

7

+CH06

26

-CH06

7

+CH22

26

-CH22

8

+CH07

27

-CH07

8

+CH23

27

-CH23

9

+CH08

 

8-11

28

-CH08

9

+CH24

 

24-27

28

-CH24

10

+CH09

29

-CH09

10

+CH25

29

-CH25

11

+CH10

30

-CH10

11

+CH26

30

-CH26

12

+CH11

31

-CH11

12

+CH27

31

-CH27

13

+CH12

 

12-15

32

-CH12

13

+CH28

 

28-31

32

-CH28

14

+CH13

33

-CH13

14

+CH29

33

-CH29

15

+CH14

34

-CH14

15

+CH30

34

-CH30

16

+CH15

35

-CH15

16

+CH31

35

-CH31

17



36


17



36


18

Vuser 1*


37

Vrtn 1*

18

Vuser 2*


37

Vrtn 2*

19





19






Note: Vuser and Vrtn signals are only used with digital output modules



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