• MMC Unitary Model Test Procedure Results User Help
• Components by Library
  • Carrier Signal Generation Block
  • MMC CPU Model Configuration Block
  • MMC CPU Parameters Block
  • PWM Generation Block
  • VSC Configuration Block
  • VSC External Capacitor Block
  • VSC Internal Capacitor Block
  • VSC Parameter Block
  • VSC Valve Block
• The Functions of Key Blocks in Console Explanations
  • Functions of Input Blocks
  • Functions of Display Blocks
  • Valid Range of Parameters
• Test Design for Half Bridge Topology
  • Maximum Cell Number Test
  • Vcap Observer and MMC PULSE Block Test
  • Vcap Mode Test
  • Fault Signals Test
  • Cell Capacitance Verification
  • Cell Shunt Resistor Verification
  • Switch Ron Verification
• Test Design for Full Bridge Topology
  • Full-Bridge Topology Maximum Cell Number Test
  • Full-Bridge Topology Vcap Display and MMC PULSE Block Test
  • Full-Bridge Topology Vcap Mode Test
  • Full-Bridge Topology Fault Signals Test
  • Full-Bridge Topology Cell Capacitance Verification
  • Full-Bridge Topology Cell Shunt Resistor Verification
  • Full-Bridge Topology Switch Ron Verification
• Example MMC Models
  • MMC HVDC
  • MMC STATCOM
• Example VSC Models
  • VSC 2-Level Switching Function Model With Midpoint Grounded
  • VSC 2-Level Switching Function Model Without Midpoint Grounded
  • VSC Solid State Transformer
  • VSC Switching Function Model with Variant Subsystems
• MMC Release Notes

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