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The OPAL-RT electric Hardware Solver (eHS) is a floating-point solver that enables users to simulate an electric circuit on an FPGA without having to write the mathematical equations. It combines the simplicity of building electric circuit models using circuit editing software with the strength of FPGA-based simulators to solve the currents and voltages within the circuit in real-time, with a sample time below 1µs.

The eHS Solver uses Modified Nodal Analysis to generate a conductance matrix that, when solved, returns the voltage at each node of the circuit and the current in each branch. The conductance matrix of the circuit is generated independently from the state of the switches, and therefore does not need to be recomputed when a switch is opened or closed during the simulation.  This is achieved through the implementation of the Pejovic method, which represents each Switch component as an impedance–a conducting switch is represented as an inductor and an open switch is represented as a capacitor.

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