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The integration of high-end INTEL multi-core multicore processors with powerful Xilinx Kintex 7 FPGA provides greater simulation power and sub-microsecond simulation time steps to maximize the accuracy of fast power electronic systems. The OP4510 V2 can simulate power grids with up to 200 nodes.

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SFP ports can be used to expand the simulator I/O capability with OPAL-RT’s MUlti-System Expansion (MUSEMuSE): each port can be connected to a remote I/O unit (OP4200, OP4520, OP5607), effectively increasing the simulator’s capacity to 1024 channels.

Ports not used for high-speed links remain compatible with Generic Aurora links. The MuSE link is compatible with OPAL-RT boards and OPAL-RT’s new I/O management architecture.

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A NOTE RE: MuSE CONFIGURATION

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Use Case

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Schematic

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Description

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Standalone configuration

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In this configuration, the OP4510V2 is a standalone unit

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MuSE: CENTRAL configuration

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In this configuration, IO expansion units are connected to the OP4510V2 via the MuSE link. 

This expands the OP4510V2 IO capability

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MuSE: REMOTE configuration

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In this configuration, the OP4510V2 is programmed with a MuSE remote bitstream, and connected to a MuSE central simulator

(*) In this configuration, the CPU and 3rd party IO of the OP4510V2 cannot be used in the model, only the FPGA, and IOs

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Simulator Architecture

The following image illustrates the simulator’s architecture for each option using assembly views of the simulation hardware components within the OP4510 V2 chassis.

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