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This Hardware Configuration has been archived and should not be used in new projects. Please contact OPAL-RT Support for more information.

Specifications

IO Capabilities

This configuration requires the following FPGA boards and adapter modules. Please refer to the linked product page for additional information.

Quantity

FPGA Board

FlexRIO Adapter Module
1PXIe-7868R-
1

PXIe-7971R

NI 5742R
1

PXIe-7976R

NI 6581B


PXIe-7976R

Setup

In this configuration, the NI PXIe-7976R is used with the NI 6581B FlexRIO Adapter Module. Please refer to NI 6581B product page for additional information.

IO Type

Details

Digital Input

38 CH, 100MHz, 3.3V TTL (Connectors A and B)

Digital Output

16 CH, 100MHz, 3.3V TTL (Connector A)

User-defined mapping to Digital Outputs available with tunable Polarity.

  • CPU (VeriStand)
  • Encoders
  • Hall Effect Sensors
  • Digital Inputs

Refer to 7976R+6581B IO Assignation [eHSx128_Dual_PMSM_SH_IO_7976R] to see the IO assignment.

Modeling Capabilities

This configuration includes a pre-compiled firmware/bitfile which contains the following features:

Features

Additional Information

1x eHSx128 Solver

User-defined mapping to Circuit Sources available:

  • CPU (VeriStand)
  • Sinewaves
  • PMSM SH

User-defined mapping to Circuit Switches available:

  • CPU (VeriStand)
  • PWMs
  • SPWMs
  • Digital Inputs
2x PMSM Spatial Harmonics ModelV2 implementation of the PMSM SH machine model.
Refer to Permanent Magnet Synchronous Machine Models Comparison for more information
1x Encoder/motorAssignable to any DO port
1x Hall Effect Sensor/motorAssignable to any DO port

PXIe-7971R

Setup

In this configuration, the NI PXIe-7971R is used with the NI 5742R FlexRIO Adapter Module. Please refer to NI 5742R product page for additional information.

IO Type

Details

Analog Output

32 CH, 1MS\s, 16-bit

User-defined mapping to Analog Outputs available with tunable Gain, Offset, and Min/Max Saturation.

  • Measurements
  • Sinewaves
  • CPU (VeriStand)
  • PMSM SH

Refer to 7971R+5742R IO Assignation [eHSx128_Dual_PMSM_SH_IO_7976R] to see the IO assignment.

Modeling Capabilities

This configuration includes a pre-compiled firmware/bitfile which contains the following features:

Features

Additional Information

32x Sinewave Generators
16x PWM Generators
12x Sinusoidal PWM Generators
Analog Output Mapping and Rescaling
32x Waveform Acquisition Channels

PXIe-7868R

IO Type

Details

Analog Input

6 CH, 1MS\s, 16-bit, +/- 10V Input Signal Range, Differential

Tunable Gain, Offset, and Min/Max Saturation

Analog Output

18 CH, 1MS\s, 16-bit

User-defined mapping to Analog Outputs available with tunable Gain, Offset, and Min/Max Saturation.

  • CPU (VeriStand)
  • Resolvers
Digital Input24 CH, 80MHz, 3.3V TTL (Connector 1)
Digital Output

24 CH Total:

  • 16 CH, 10MHz, 3.3V TTL (Connector 0)
  • 8 CH, 80MHz, 3.3V TTL (Connector 1)

User-defined mapping to Digital Outputs available with tunable Polarity.

  • CPU (VeriStand)
  • Digital Inputs

Refer to 7868 IO Assignation [eHSx128_Dual_PMSM_SH_IO_7976R] to see the IO assignment.

Modeling Capabilities

This configuration includes a pre-compiled firmware/bitfile which contains the following features:

Features

Additional Information

1x Resolver/motor

PMSM 1 excitation signal is connected to AI0

PMSM 2 excitation signal is connected to AI1

Analog Output Mapping and Rescaling
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