This configuration requires the following FPGA boards. Please refer to the linked product page for additional information.
The PXIe-7868R supports the following features:
6 CH, 1MS\s, 16-bit, +/- 10V Input Signal Range, Differential
Tunable Gain, Offset, and Min/Max Saturation
18 CH, 1MS\s, 16-bit
User-defined mapping to Analog Outputs available with tunable Gain, Offset, and Min/Max Saturation.
|Digital Input||16 CH, 80MHz, 3.3V TTL (Connector 1)|
32 CH Total:
User-defined mapping to Digital Outputs available with tunable Polarity.
Refer to 7868 IO Assignation [eHSx32_Dual_PMSM_VDQ_IO_32DO_7868R] to see the IO assignment.
This configuration includes a pre-compiled firmware/bitfile which contains the following features:
1x eHSx32 Solver
User-defined mapping to Circuit Sources available:
User-defined mapping to Circuit Switches available:
|2x PMSM BLDC Solver|
Each machine supports three types: PMSM Constant Parameter, PMSM Variable Parameter, and BLDC Constant Parameter.
Refer to the PMSM BLDC Section for more information.
Excitation can be generated internally or assigned to any Analog Input port.
|1x Encoder/motor||Can be configured to simulate a Quadrature Encoder or a Hall Effect sensor. Outputs are assignable to any Digital Output port.|
|32x Sinewave Generators|
|16x PWM Generators|
|12x Sinusoidal PWM Generators|
|Analog Output Mapping and Rescaling|
|Analog Input Rescaling|
|32x Waveform Acquisition Channels|