In the System Explorer window configuration tree, expand the Power Electronics Add-On custom device and select Circuit Model >> Switches to display this page. After a model is successfully loaded in the Circuit Model Section, this page is added to the configuration tree and populated with a named list of the Switch components found in the circuit model. An incoming digital signal must be mapped to each Switch to control its state as it is simulated in the eHS solver.
For each switch, the following information and mapping options are available.
Displays the type of switch (See Supported Circuit Editors for a list of supported Switch components in the circuit model).
Filters the list of available elements to be mapped to the Switch. The available options are defined by the selected Hardware Configuration, however it is typical to see the following options by default:
|VeriStand custom device channels on the CPU. If this Group is selected, the Element dropdown is populated with a single option displaying the name of the custom device channel whose value is mapped.|
|PWM outputs of the PWM Generators Section. In the Element dropdown, select the index of the PWM Generator whose output signal to map.|
|SPWM outputs of the SPWM Generators Section. In the Element dropdown, select the name of the channel to map.|
|Digital Input channels of the PXI card. In the Element dropdown, select the index of the DI channel to map.|
The name or index of the signal to be mapped to the switch. The options available in this dropdown depend on the selected Group.
The polarity of the switch component. Active High switches are open when LOW is applied to the gate and closed when HIGH is applied to the gate. Active Low switches are closed when LOW is applied to the gate and open when HIGH is applied to the gate
|Gs||The conductance of the switch. For more information, please refer to How to Tune Switch Conductance (Gs).|
After a model has been loaded in the Circuit Model Section, the Switches section of the Configuration Tree is populated with a list of channels corresponding to each switch component found in the circuit model. If a switch is mapped to the CPU (VeriStand) Group described above, then the value of its corresponding channel defines the state of the switch during the simulation. If the CPU (VeriStand) Group is not used, then the value of the channel does not affect the circuit simulation.
Switches accept gating control signals. They are controlled with digital signals (i.e. HIGH, LOW signals) which can come from custom device channels, digital inputs, signal generators, and more. In the electrical circuit model, it is recommended (but not necessary) to denote the switches of the model with the SWXX prefix as seen in the circuit model diagram below. Switches modeled in eHS are characterized by their Switch Conductance (Gs). See Supported Circuit Editors for a list of supported Switch components in the circuit model.